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 SSM4410M
N-CHANNEL ENHANCEMENT MODE POWER MOSFET
Low on-resistance Fast switching Simple drive requirement
D D D
D
BV ID
DSS
30V 13.5m 10A
R DS(ON)
G S
SO-8
S S
Description
D
Power MOSFETs from Silicon Standard provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The SO-8 package is widely preferred for commercial and industrial surface mount applications and well suited for low voltage applications such as DC/DC converters.
G S
Absolute Maximum Ratings
Symbol VDS VGS ID @ TA=25C ID @ TA=70C IDM PD @ TA=25C TSTG TJ Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Current
1,2 3 3
Rating 30 20 10 8 50 2.5 0.02 -55 to 150 -55 to 150
Units V V A A A W W/C C C
Continuous Drain Current Total Power Dissipation Linear Derating Factor
Storage Temperature Range Operating Junction Temperature Range
Thermal Data
Symbol Rthj-amb Parameter Thermal Resistance Junction-ambient Max. Value 50 Unit C/W
Rev.2.02 12/29/2003
www.SiliconStandard.com
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SSM4410M
Electrical Characteristics @ T j=25oC (unless otherwise specified)
Symbol BVDSS
BV DSS/ Tj
Parameter Drain-Source Breakdown Voltage
Test Conditions VGS=0V, ID=250uA
Min. 30 1 -
Typ. 0.037
Max. Units 13.5 22 3 1 25 100 V V/C m m V S uA uA nA nC nC nC ns ns ns ns pF pF pF
Breakdown Voltage Temperature Coefficient Reference to 25C, ID=1mA
RDS(ON)
Static Drain-Source On-Resistance
VGS=10V, ID=10A VGS=4.5V, ID=5A
20 16.6 2.7 10.6 9.6 12.4 25.4 33 745 510 210
VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss
Gate Threshold Voltage Forward Transconductance
Drain-Source Leakage Current (Tj=25 C) Drain-Source Leakage Current (Tj=55oC)
o
VDS=VGS, ID=250uA VDS=15V, ID=10A VDS=30V, VGS=0V VDS=24V, VGS=0V VGS= 20V ID=10A VDS=15V VGS=5V VDS=25V ID=1A RG=3.3 , VGS=5V RD=25 VGS=0V VDS=15V f=1.0MHz
Gate-Source Leakage Total Gate Charge
2
Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance
2
Source-Drain Diode
Symbol IS ISM VSD Parameter
Continuous Source Current ( Body Diode )
Test Conditions VD=VG=0V , VS=1.3V
1
Min. -
Typ. -
Max. Units 2.3 50 1.3 A A V
Pulsed Source Current ( Body Diode )
Forward On Voltage
2
Tj=25C, IS=2.3A, VGS=0V
Notes:
1.Pulse width limited by Max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on FR4 board, t<10 sec.
Rev.2.02 12/29/2003
www.SiliconStandard.com
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SSM4410M
200
150
T C =25 C
o
V G =10V V G =8.0V
T C =150 o C
V G =10V V G =8.0V
150
ID , Drain Current (A)
ID , Drain Current (A)
100
V G =6.0V
100
V G =6.0V
50
V G =4.0V
50
V G =4.0V
0 0 1 2 3 4 5 6 7 8
0 0 2 4 6 8
V DS , Drain-to-Source Voltage (V)
V DS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
20
1.8
I D =10A
18
T C =25 o C
1.6
I D =10A V G =10V
RDSON (m )
16
Normalized R DS(ON)
1.4
1.2
14
1
12
0.8
10 3 4 5 6 7 8 9 10 11
0.6 -50 0 50 100 150
V GS (V)
T j , Junction Temperature ( o C)
Fig 3. On-Resistance v.s. Gate Voltage
Fig 4. Normalized On-Resistance vs. Junction Temperature
Rev.2.02 12/29/2003
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SSM4410M
12
3
10
2.5
ID , Drain Current (A)
8
2
PD (W)
6
1.5
4
1
2
0.5
0 25 50 75 100 125 150
0 0 30 60 90 120 150
T c , Case Temperature ( o C )
T c , Case Temperature ( C)
o
Fig 5. Maximum Drain Current v.s. Case Temperature
Fig 6. Typical Power Dissipation
100
1
DUTY=0.5
Normalized Thermal Response (R thja)
0.2
10
1ms
0.1
0.1
0.05
ID (A)
10ms
0.02 0.01
PDM
1
100ms
0.01
SINGLE PULSE
t T
Duty factor = t/T Peak Tj = P DM x Rthja + Ta
T c =25 o C Single Pluse
0.1 0.1 1 10
1s
100
0.001 0.0001
0.001
0.01
0.1
1
10
100
1000
V DS (V)
t , Pulse Width (s)
Fig 7. Maximum Safe Operating Area
Fig 8. Effective Transient Thermal Impedance
Rev.2.02 12/29/2003
www.SiliconStandard.com
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SSM4410M
12
10000
f=1.0MHz
I D =10A
10
V DS =15V
VGS , Gate to Source Voltage (V)
8
1000
Ciss C (pF)
6
Coss Crss
4
100
2
0 0 5 10 15 20 25
10 1 7 13 19
Q G , Total Gate Charge (nC)
V DS (V)
Fig 9. Gate Charge Characteristics
Fig 10. Typical Capacitance Characteristics
100.00
3
10.00
2
1.00
VGS(th) (V)
1 0
T j =150 C IS(A)
o
T j =25 C
o
0.10
0.01 0 0.4 0.8 1.2
-50
0
50
100
150
V SD (V)
T j , Jujnction Temperature ( C )
o
Fig 11. Forward Characteristic of Reverse Diode
Fig 12. Gate Threshold Voltage vs. Junction Temperature
Rev.2.02 12/29/2003
www.SiliconStandard.com
5 of 6
SSM4410M
VDS
RD
90%
D
VDS
TO THE OSCILLOSCOPE VDS = 25V
RG
G
+ 5v -
S VGS
10% VGS td(on) tr td(off) tf
Fig 13. Switching Time Circuit
Fig 14. Switching Time Waveform
VG
VDS TO THE OSCILLOSCOPE
QG 5V
D
G S
+
0.5 xRATED VDS
QGS
QGD
VGS
1~ 3 mA
I
G
ID
Charge
Q
Fig 15. Gate Charge Circuit
Fig 16. Gate Charge Waveform
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties.
Rev.2.02 12/29/2003
www.SiliconStandard.com
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